Verification Engineer

Description

You will be an handon Verification engineer, developing verification methodologies and testbench for testing of wireless products. Main Responsibilities Architect testbench for full chip and block level verification of Mobile LTE product(s).Architect and Develop verification environment using the stateoftheart verificationMethodology and practices like VMMDevelopment will be done using C/C++, Verilog/System Verilog, and FPGA developmentPlatform. Prior FPGA knowledge is a plus.Develop test plans, execute and track progressDesired Qualifications Self Motivated, Team Player that can work with various groupsAbility to multitask various verification activities.BS in Electrical Engineering required, prefer MS Electrical Engineering or Computer Science5years in ASIC verification. Experience in building Verification environments usingSystemVerilog, VMM/OVM Past experience in Lowpower verification is a huge plusExperience building verification environment using Constraint Random, SystemVerilog AssertionsStrong knowledge of ARM, AXI, APB, DMA, DDR[2] controllersFamiliar with peripheral devices like I2C, SDIO, USB, SDRAM, USIMPrior experience in verifying OFDM[A]/DMT based systems, digital modems, GSM/GPS/CDMA, EthernetPhysical Layer or other communication systems would be helpful but not requiredShould be comfortable with developing/modifying C/C++, Shell scripting, Perl, and Makefiles