ASIC Design Verification Engineer
Broadcom Corporation
Contract Irvine, California, United States Posted 1 year ago
About Position
ASIC Design Verification Engineer (Contract)
$55.00 / Hourly
Irvine, California, United States
ASIC Design Verification Engineer
Contract Irvine, California, United States Posted 1 year ago
Skills
• BSEE • Verification Experience (12+ years) • Emulation Experience (8+ years) • C/C++ Experience • Verilog or VHDL Knowledge • Strong debugging skills • Strong communication skillsDescription
The verification team in Broadcom’s Broadband Video Group is looking for an experienced design verification engineer with emulation experience.
The position entails working closely with core designers, chip-level integration architects, software developers, and other verification engineers on state of the art broadband video products.
The team member would be contributing to the verification of highly advanced digital designs and extremely complex SOCs.
The candidate will be creating various emulation databases for complicated testing systems, developing both C/C++ tools and UVM UVCs, and writing scripts to support flows and debugging platforms.
Experience with C/C++ is required, while knowledge of UVM and a scripting language such as PERL or Python is strongly desired.
The colleague should have 12+ years of design verification experience and 8+ years of emulation experience, preferably with Siemen’s Veloce platform.
Position is on site at Irvine, San Jose, San Diego locations.
Responsibilities
- • UVM Knowledge
- • Scripting Knowledge
- • RTL Design Experience
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Broadcom Corporation
16215 Alton Parkway